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AI4EDA-CASELAB

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https://github.com/NellyW8
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AI4EDA-CASE 's collections 1

Verireason
Dataset and Model for paper: "VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation"
  • Nellyw888/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb

    Reinforcement Learning • 7B • Updated May 31, 2025 • 17 • 2
  • Nellyw888/VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb

    Reinforcement Learning • 3B • Updated May 31, 2025 • 28
  • Nellyw888/VeriReason-Qwen2.5-1.5b-RTLCoder-Verilog-GRPO-reasoning-tb

    Reinforcement Learning • 2B • Updated May 20, 2025 • 6 • 1
  • Nellyw888/RTL-Coder_small

    Viewer • Updated May 20, 2025 • 2.65k • 53 • 1
Verireason
Dataset and Model for paper: "VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation"
  • Nellyw888/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb

    Reinforcement Learning • 7B • Updated May 31, 2025 • 17 • 2
  • Nellyw888/VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb

    Reinforcement Learning • 3B • Updated May 31, 2025 • 28
  • Nellyw888/VeriReason-Qwen2.5-1.5b-RTLCoder-Verilog-GRPO-reasoning-tb

    Reinforcement Learning • 2B • Updated May 20, 2025 • 6 • 1
  • Nellyw888/RTL-Coder_small

    Viewer • Updated May 20, 2025 • 2.65k • 53 • 1
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